Error while connecting to Edge Impulse (Ambiq Apollo 5)

I followed all the instructions, and also run the flas_win.bat successfully. When I try to run the edge-impulse-daemon it’s not able to estabilish connection and the terminal shows me
“[SER] Serial is connected, trying to read config…
[SER] Failed to get info off device Timeout when waiting for > (timeout: 5000) onConnected”
The usb cable is working with no problems for other projects, how con I fix this issue? I tried also to disconnect the board, reset it. If someone knows how to solve the error, I’ll be grateful.

Welcome @emonaldi I’m checking with our embedded team now, I guess you have flashed the latest firmware to your hardware via segger as described in the docs, was there any output while flashing you can share?

Best

Eoin

Hi @emonaldi

You are on windows, do you see any COM device when you plug in the board ?
I’ll check on windows.

fv

Hi @emonaldi

Did you connect both USB ?

see from readme:

  • Connect a USB C cable to J4 and one to J6

one is for the JLink and the other one for the USB communication with the MCU

fv

Hi,
The flashing is completed correctly, I attach the script for checking.
J-Link Command File read successfully.
Processing script file…
J-Link>ExitOnError 1
J-Link Commander will now exit on Error
J-Link>Reset
J-Link connection not established yet but required for command.
Connecting to J-Link via USB…O.K.
Firmware: J-Link OB-Apollo4-CortexM compiled Feb 5 2026 13:07:52
Hardware version: V1.00
J-Link uptime (since boot): 0d 00h 00m 04s
S/N: 1160002332
USB speed mode: Full speed (12 MBit/s)
VTref=1.800V
Target connection not established yet but required for command.
Device “AP510NFA-CBR” selected.

Connecting to target via SWD
ConfigTargetSettings() start
Disabling flash programming optimizations: SkipBlankDataOnProg
ConfigTargetSettings() end - Took 129us
Found SW-DP with ID 0x4C013477
DPIDR: 0x4C013477
CoreSight SoC-600 or later (DPv3 detected)
Detecting available APs
APSpace base (BASEPTR0): 0x00000000
APSpace size (DPIDR1.ASIZE): 12-bit (4 KB)
AP[0]: Stopped AP scan as end of AP map has been reached
AP[0] (APAddr 0x00000000): AHB-AP (IDR: 0x34770008)
Iterating through AP map to find AHB-AP to use
AP[0]: Skipped. Could not read CPUID register
Attach to CPU failed. Executing connect under reset.
Failed to power up DAP
ConfigTargetSettings() start
Disabling flash programming optimizations: SkipBlankDataOnProg
ConfigTargetSettings() end - Took 275us
Failed to attach to CPU. Trying connect under reset.
Found SW-DP with ID 0x4C013477
SWD speed too high. Reduced from 4000 kHz to 2700 kHz for stability
DPIDR: 0x4C013477
CoreSight SoC-600 or later (DPv3 detected)
Detecting available APs
APSpace base (BASEPTR0): 0x00000000
APSpace size (DPIDR1.ASIZE): 12-bit (4 KB)
AP[0]: Stopped AP scan as end of AP map has been reached
AP[0] (APAddr 0x00000000): AHB-AP (IDR: 0x34770008)
Iterating through AP map to find AHB-AP to use
AP[0]: Core found
AP[0]: AHB-AP ROM base: 0xE00FE000
CPUID register: 0x411FD221. Implementer code: 0x41 (ARM)
Feature set: Mainline
Cache: L1 I/D-cache present
Found Cortex-M55 r1p1, Little endian.
FPUnit: 8 code (BP) slots and 0 literal slots
Security extension: implemented
Secure debug: enabled
PACBTI extension: not implemented
CoreSight components:
ROMTbl[0] @ E00FE000
[0][0]: E00FF000 CID B105100D PID 000BB4D2 DEVARCH 00000000 DEVTYPE 01 ROM Table
ROMTbl[1] @ E00FF000
[1][0]: E000E000 CID B105900D PID 000BBD22 DEVARCH 47702A04 DEVTYPE 00 ???
[1][1]: E0001000 CID B105900D PID 000BBD22 DEVARCH 47711A02 DEVTYPE 00 DWT
[1][2]: E0002000 CID B105900D PID 000BBD22 DEVARCH 47701A03 DEVTYPE 00 FPB
[1][3]: E0000000 CID B105900D PID 000BBD22 DEVARCH 47701A01 DEVTYPE 43 ITM
[1][5]: E0041000 CID B105900D PID 004BBD22 DEVARCH 47754A13 DEVTYPE 13 ETM
[1][6]: E0003000 CID B105900D PID 000BBD22 DEVARCH 47700A06 DEVTYPE 16 ???
[1][7]: E0042000 CID B105900D PID 000BBD22 DEVARCH 47701A14 DEVTYPE 14 CSS600-CTI
[0][1]: E0040000 CID B105900D PID 000BBD22 DEVARCH 00000000 DEVTYPE 11 TPIU
[0][2]: E0045000 CID B105900D PID 006BB9E9 DEVARCH 00000000 DEVTYPE 21 ETB
I-Cache L1: 64 KB, 1024 Sets, 32 Bytes/Line, 2-Way
D-Cache L1: 64 KB, 512 Sets, 32 Bytes/Line, 4-Way
Memory zones:
Zone: “Default” Description: Default access mode
Cortex-M55 identified.
Reset delay: 0 ms
ResetTarget() start
JDEC PID 0x00000EA0
Ambiq Apollo5 ResetTarget
Bootldr = 0xA4000005
Secure Part.
Secure Chip. Bootloader needs to run which will then halt when finish.
CPU halted after reset. TryCount = 0x00000000
ResetTarget() end - Took 106ms
Device specific reset executed.
J-Link>loadfile firmware-ambiq-apollo5.bin, 0x00410000
‘loadfile’: Performing implicit reset & halt of MCU.
ResetTarget() start
JDEC PID 0x00000EA0
Ambiq Apollo5 ResetTarget
Bootldr = 0xA4000005
Secure Part.
Secure Chip. Bootloader needs to run which will then halt when finish.
CPU halted after reset. TryCount = 0x00000000
ResetTarget() end - Took 107ms
Device specific reset executed.
Downloading file [firmware-ambiq-apollo5.bin]…
Erasing flash [100%] Done.
Programming flash [100%] Done.
Verifying flash [100%] Done.
J-Link: Flash download: Bank 0 @ 0x00410000: 1 range affected (475136 bytes)
J-Link: Flash download: Total: 2.912s (Prepare: 0.155s, Compare: 0.000s, Erase: 0.000s, Program: 2.451s, Verify: 0.206s, Restore: 0.098s)
J-Link: Flash download: Program & Verify speed: 174 KB/s
O.K.
J-Link>Exit
Script processing completed.

Bests

Hi @emonaldi

when you connect both USB, you should see 2 COM avialable.
One is the JLink the other serial connection to the MCU, try both.

regards,
fv

Actually the problem is that I still don’t see the second port, but only the one for the JLink

@emonaldi have you tested any Ambiq sample ? can you run a debug session ?